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FUNCTIONAL DESCRIPTION
INTRODUCTION
FUNCTIONAL DESCRIPTION
INTRODUCTION
The power FETs are turned ON by charging their gate
capacities with a current flowing out of pins OUT1 and OUT2.
During PWM, the values of table below are guaranteed. They
are measured with 8.0 nF on OUT1 and 16 nF on OUT2. Test
condition V IN : ramp 0 V ≤ 2.5 V or 2.5 V ≤ 5.0 V.
IN
5.0 V
2.5 V
V CCP
IN
THRIN2
THRIN1
V OUT1
V VCC + 7.0
V OUT2
20 ms
V OUT2
5.0 V
IN
2.5 V
0V
IN
2.5 V
V OUT2MAX
V OUT1MAX
V OUT2
V OUT1
0V
0
t ON1 t ON2
t ON3
0V
0
t ON1
t ON3
t ON2
VOLTAGE V VCC
7.0 V < V VCC < 10 V
10 V < V VCC < 20 V
20 V < V VCC < 40 V
MINIMUM V OUT 1, OUT2
AFTER T ON1 = 100 μ SEC
V VCC - 0.7 V
V VCC - 0.7 V
V VCC - 0.7 V
MINIMUM V OUT 1,OUT2
AFTER T ON2 = 1.0 μ SEC
V VCC + 5.95 V
V VCC + 9.35 V
MINIMUM V OUT 1,OUT2
AFTER T ON3 = 1.5 μ SEC
V VCC + 7.0 V
V VCC + 11 V
Figure 4. Turn On Behavior
Turn Off Characteristics
The output voltages at OUT1 and OUT2 are limited by
controlling the current sources I ON1 , I ON2 to avoid current
flowing through the external or the internal zener diode.
When voltage power supply plus threshold voltage
(V CC + V TH ) is reached, the current sources are turned OFF.
? Threshold V TH1 for OUT1 output voltage control is
7.0 V < V TH1 < V Z
? Threshold V TH2 for OUT2 output voltage control is
7.0 V < V TH2 < 15 V
The power FETs on OUT1 and OUT2 are turned OFF by
discharging the gate capacity with the constant discharge
current I OUTOFF .
? Discharge current I OUTxOFF is I OUTxOFF = 110 μ A
condition: V OUT x > 0.5 V ( V IN < V THRxIN )
? Test conditions for switching OFF the power FETs:
1. IN open
2. Stages disabled via pin IN
3. Stage OUT1 disabled by an over current error
33285
Analog Integrated Circuit Device Data
Freescale Semiconductor
7
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